A very large scale integration expert witness typically has a PhD and extensive experience in computer science and/or electrical engineering. Specific expertise in embedded systems or wireless communication may be requested for a litigation support role. Cahn Litigation Services has been approached by numerous legal teams to locate expert witnesses, on behalf of either the plaintiff or defendant, that can support matters involving very large scale integration (VLSI) technology. The chosen expert witness may be a member of an industry organization such as the IEEE. A very large scale integration expert witness must have a deep understanding not only of the target technology, but also of the semiconductor device market dynamics, market share and the developing technologies of the industry’s leading players.
In VLSI technology litigation, an expert can anticipate expert witness services such as depositions, an expert report, reverse engineering, forensic analysis, trial testimony, and related consulting activities. In high profile cases, or litigation involving a significant financial stake, previous expert testimony experience is often a requirement.
Cahn Litigation Services has a vast expert network and is regularly called on by law firm clients upon to locate integrated circuit expert witnesses with specific expertise in very large scale integration technology for matters involving intellectual property, such as patent infringement and trade secret cases.
Please Note: All Cahn Litigation expert witness searches are customized to attorneys' precise specifications and preferences. Attorneys are encouraged to discuss search parameters with a Cahn search specialist.
The below expert witness bios represent a small fraction of those Very Large Scale Integration experts known by Cahn Litigation Services. These bios are provided to give attorneys a sense of the Very Large Scale Integration landscape.
This expert holds B.S., M.S. and Ph. D. degrees in Electrical Engineering. This expert has worked on the design of bipolar differential amplifiers, as well as in the areas of custom IC design, software compatible gate array design, one- and two-dimensional device modeling, circuit modeling, and double level metal process development. This expert was Manager of a Signal Processing Design and Test Department, responsible for the design and test of high performance VLSI/VHSIC CMOS and BIMOS digital and analog ICs, the development of supporting design and test methodologies and CAD tools, functional and parametric test, and the development of high performance and high resolution DSP and oversampled systems.
This expert is a Distinguished Professor and Director of the High Performance VLSI/IC Design and Analysis Laboratory at a major university. This expert’s current research and teaching interests include:
On-Chip Interconnect, Power, and Substrate Coupling Noise
High Performance Digital and Analog Integrated Circuit Design
Three-Dimensional Integrated Design Methodologies, Algorithms, and Test Circuits
Circuits, Models, and Architectures Based on Emerging Technologies
Efficient Power Delivery for Highly Complex Integrated Systems
High Performance Clock Distribution Networks
This expert has authored twelve book chapters and many papers in the fields of high speed and low power CMOS design techniques, interconnect and substrate noise, pipelining and retiming, three-dimensional integration, and the theory and application of power and synchronous clock distribution networks. This expert has also authored or edited sixteen books. This expert is a Fellow of the IEEE, an editor of the Journal of Circuits, Systems and Computers, a Member of Analog Integrated Circuits and Signal Processing, Microelectronics Journal, Journal of Low Power Electronics, and Journal of VLSI Signal Processing, and a Member of the technical program committee of a number of conferences.