Very Large Scale Integration (VSLI) expert witness candidates typically have PhDs and extensive experience in computer science and/or electrical engineering. Specific expertise in embedded systems or wireless communication may be requested for a litigation support role. Cahn Litigation Services has been approached by numerous legal teams to locate expert witnesses, on behalf of either the plaintiff or defendant, that can support matters involving very large scale integration (VLSI) technology. The chosen expert witness may be a member of an industry organization such as the IEEE. A very large scale integration expert witness must have a deep understanding not only of the target technology, but also of the semiconductor device market dynamics, market share and the developing technologies of the industry’s leading players.
In VLSI technology litigation, an expert can anticipate expert witness services such as depositions, an expert report, reverse engineering, forensic analysis, trial testimony, and related consulting activities. In high profile cases, or litigation involving a significant financial stake, previous expert testimony experience is often a requirement.
Cahn Litigation Services has a vast expert network and is regularly called on by law firm clients upon to locate integrated circuit expert witnesses with specific expertise in very large scale integration technology for matters involving intellectual property, such as patent infringement and trade secret cases.
Please Note: All Cahn Litigation expert witness searches are customized to attorneys' precise specifications and preferences. Attorneys are encouraged to discuss search parameters with a Cahn search specialist.
The below expert witness bios represent a small fraction of those Very Large Scale Integration experts known by Cahn Litigation Services. These bios are provided to give attorneys a sense of the Very Large Scale Integration landscape.
This expert holds B.S., M.S. and Ph. D. degrees in Electrical Engineering. This expert has worked on the design of bipolar differential amplifiers, as well as in the areas of custom IC design, software compatible gate array design, one- and two-dimensional device modeling, circuit modeling, and double level metal process development. This expert was Manager of a Signal Processing Design and Test Department, responsible for the design and test of high performance VLSI/VHSIC CMOS and BIMOS digital and analog ICs, the development of supporting design and test methodologies and CAD tools, functional and parametric test, and the development of high performance and high resolution DSP and oversampled systems.
This expert is a Distinguished Professor and Director of the High Performance VLSI/IC Design and Analysis Laboratory at a major university. This expert’s current research and teaching interests include:
On-Chip Interconnect, Power, and Substrate Coupling Noise
High Performance Digital and Analog Integrated Circuit Design
Three-Dimensional Integrated Design Methodologies, Algorithms, and Test Circuits
Circuits, Models, and Architectures Based on Emerging Technologies
Efficient Power Delivery for Highly Complex Integrated Systems
High Performance Clock Distribution Networks
This expert has authored twelve book chapters and many papers in the fields of high speed and low power CMOS design techniques, interconnect and substrate noise, pipelining and retiming, three-dimensional integration, and the theory and application of power and synchronous clock distribution networks. This expert has also authored or edited sixteen books. This expert is a Fellow of the IEEE, an editor of the Journal of Circuits, Systems and Computers, a Member of Analog Integrated Circuits and Signal Processing, Microelectronics Journal, Journal of Low Power Electronics, and Journal of VLSI Signal Processing, and a Member of the technical program committee of a number of conferences.
This expert serves as Director of the Advanced Computer Engineering Laboratory at a prestigious university, and is engaged in solving problems related to high-performance and low-power computing systems with focus on VLSI chip engineering. This expert specializes in high-speed digital circuits as well as low-power design, low-power digital circuit libraries and optimal relationship between computational energy and speed. This expert's broader expertise is also in Computer Arithmetic, Media Signal Processing, Cryptography and System Architecture. This expert is a Professor Emeritus and has held Visiting Professor positions several universities. This expert obtained Ph.D. and MSc degrees in Computer Science and a Dipl. Ing. (MScEE) degree in electronics and telecommunications. This expert worked on development of early RISC and super-scalar RISC processors, and holds several patents on the subject. This expert's engagements include positions with many technology leaders. This expert's interest is in VLSI systems, fast circuits, low-power design and efficient implementations of computer arithmetic. This expert's work has been applied in several leading processors. This expert holds 15 USA and 7 International patents and 5 others pending. This expert has published over 170 papers in the areas of circuits and technology, computer arithmetic and computer architecture, written three books and a dozen book chapters and one edited book in high-performance system design. This expert is a Fellow of IEEE and a member of the American Association for Advancement of Science and the American Association of the University Professors.
This expert is active in technical programs worldwide mostly related to the semiconductor industry. This expert has been an invited speaker in a number of meetings including a VLSI conference sponsored by IEEE.
This expert is a full professor of Computer Science at University. This expert has a clear focus on CMP and planarization. This expert's research is primarily in CMP, very large scale integrated (VLSI) computer chip manufacturing, CAD, algorithms, RFID and intellectual property. This expert is an experienced expert witness, having served in 20 patent litigations for national law firms and their high- profile clients in prior art, validity and infringement matters including hardware, software, methods and processes for both plaintiffs and defendants. As an academician, this expert is well-published with over 160 writings including books and book chapters, refereed journal papers, refereed conference papers, technical reports and the like. This expert has been the subject of over 30 articles and is a frequent presenter of industry and academic conferences.
This expert holds a PhD and MS in Electrical Engineering, and presently serves as Professor of Electrical Engineering at a State University. For many years, this expert has taught a year-long sequence of graduate level classes in System-on-Chip design. Further, this expert's career has been spent as a professor doing research on VLSI design, both analog and digital, including SoC design. This expert has designed SoCs, fabricated them, and published the results. This expert's research interests center primarily on the design and computer-aided design of digital and analog integrated circuits. Ongoing projects include: optimal gate size and threshold voltage selection for absolute leakage and/or dynamic power minimization subject to a frequency constraint; fast, accurate simulation-based timing analysis; more accurate power estimation for digital circuits; ultra low power time-to-digital conversion; resilient logic and memory for truly sub-threshold operation; for example, highly reliable, very low area overhead asynchronous logic design operating at sub-threshold voltages. Also, the design of secure ICs that cannot be reverse engineered and reverse engineering PCBs that are damaged and/or discarded. This expert has extensive prior litigation experience including deposition and testimony.
This expert has worked with PMOS, NMOS, and CMOS process technologies throughout this expert's career, including many years in the semiconductor industry. Following the stint in industry, this expert joined the Electrical Engineering Department at a University where this expert teaches graduate and undergraduate courses in semiconductor/integrated circuit design and test technology, electronic devices and circuits, and VLSI technology. At a major technology company, this expert contributed to a number of product technology programs including the 4K DRAM, CCDs, NMOS and CMOS process development and non-volatile memories (DIFMOS), one of the first commercial EEPROM devices. In addition, this expert is the inventor or co-inventor of fourteen patents in semiconductor memory circuits and related fields. A silicon device expert with specific emphasis on process, device design, device characteristics and the use of the devices within the integrated circuit memories, this expert's consulting activities include serving as an expert witness in the fields of integrated circuit and transistor technology, and in areas dealing with electrical and electronic product design and electrical safety. This expert has published a variety of technical papers on subjects ranging from floating-gate nonvolatile memories to digital converters to numerical analysis of storage times of DRAM cells incorporating ultrathin dielectrics. This expert holds thirteen patents in the field of semiconductor devices, processes and circuits, is an IEEE Senior Member and has extensive expert witness experience providing deposition and testimony in various courts for over one hundred cases.